# 2019-07-24 | r2dec - SuperH support
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  I've added Hitachi SuperH support to r2dec.
  Wasn't too hard.
  The instruction set is in between MIPS (yes, it has delayed branches) and Renesas v850,
  due the way instruction set is written (mnem op1 op0 -> Rd = op0 and Rs = op1).

  Example:



                   ; Hitachi SuperH
    add  0xf8, r15 ; r15 = r15 + 0xf8;
    tst  r2, r2    ; cmp = r2 & r2;
    mov  r15, r14  ; r14 = r15;
                   ; delayed branch
    bt.s 0x1234    ; if (cmp == 1) goto 0x1234;



  As you can see `add 0xf8, r15` become `r15 += 0xf8` where the last operand is the
  destination register.

  On Renesas v850 the syntax looks similar:



                      ; Renesas v850
    addi 0xf8 r15 r15 ; r15 = r15 + 0xf8;
    tst  r2, r2       ; cmp = r2 & r2
    mov  r15, r14     ; r14 = r15;
    be   0x1234       ; if (cmp == 1) goto 0x1234;



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# References:
  https://www.rockbox.org/wiki/pub/Main/DataSheets/sh1_2p.pdf
  http://www.shared-ptr.com/sh_insns.html